Oski at DVCon

Booth # 205


TUESDAY February 27, 10:30am – 12:00pm | Gateway Foyer
Poster Session

4.19 Formal Verification of Silicon for Software Defined Networking

Speaker: Saurabh Shrivastava – Cavium, Inc.

Authors: Saurabh Shrivastava – Cavium, Inc.
Anh Tran – Cavium, Inc. & Xpliant, Inc.
Keqin Han – Cavium, Inc.
Chirag Agarwal – Oski Technology, Inc.
Ankit Saxena – Oski Technology, Inc.
Anshul Jain – Oski Technology, Inc.
Achin Mittal – Oski Technology, Inc.
Roger Sabbagh – Oski Technology, Inc.



Formal Verification Use Models

Wednesday February 28, 10:00am – 12:00pm | Fir

9.2 Architectural Formal Verification of System-Level Deadlocks

Speakers: Vigyan Singhal – Oski Technology, Inc.
Mandar Munishwar – Qualcomm, Inc.

Authors: Mandar Munishwar – Qualcomm, Inc.
Naveed Zaman – Qualcomm, Inc.
Anshul Jain – Oski Technology, Inc.
HarGovind Singh – Oski Technology, Inc.
Vigyan Singhal – Oski Technology, Inc.



TUESDAY February 27, 6:00pm – 8:00pm | Oak/Fir

Conquering Formal Verification: Go Deep or Go Broad?

Moderator: Sean Safarpour – Synopsys, Inc.
Successful users of formal verification often fall into one of two camps: The deep Property Verification advocates and the Broad Formal Apps advocates. In terms of impact on the verification cycle – reducing verification time/effort and finding more bugs – which approach has been most successful: doing deep verification with custom-written assertions often by formal experts OR the application of formal Apps such as Connectivity Checking, Unreachability Analysis or Register Verification to name a few. While going deep is often very powerful, it is limited to experts who can use is effectively. On the other hand, going broad can be used by thousands of engineers with minimal training, but the impact is limited to existing off-the-shelf applications. A panel of passionate verification engineers and managers join us to share their perspective of the most successful deployment of formal verification.

Evening Agenda:
6:00 – 6:30pm: Appetizers, drinks and socializing, + Formal Challenge
6:30 – 7:30pm: Panel
7:30pm – Puzzle winner announcement
7:30 – 8pm: Dessert, drinks and socializing

Erik Seligman – Intel Corp.
Naveed Zaman – Qualcomm, Inc.
Shaun Feng – Samsung Semiconductor, Inc.
Vigyan Singhal – Oski Technology, Inc.

Please note: DVCon Conference Badge required for entrance.

Sponsored by:


WEDNESDAY February 28, 8:30am – 9:30am | Oak/Fir

Help! System Coverage is a Big Data Problem!

Moderator: Brian Bailey – Semiconductor Engineering

While coverage is undergoing a renaissance, partly driven by new automotive systematic verification methodologies that demand a rigorous approach to measuring system coverage versus original specification, more attention to system coverage is needed. Coverage metrics help development groups understand the quality of their verification efforts and coverage holes represent risk of failure. At the system level, there are no standardized metrics and no way to exhaustively close coverage. The emergence of Portable Stimulus brings some structure to the problem, but opens up as many questions as it provides answers. For a typical design, the total number of paths through a graph is on the order of 2100 and that’s before all the possible concurrency issues are considered. System coverage has all of the hallmarks of being a big data problem. The good news is that system coverage is directly tied to intent and development groups soon will have better quality metrics than they did in the past. Moderator Brian Bailey and a panel of experts will explore various best practices in use by the industry. They will examine ways in which Portable Stimulus, formal verification methods, emulation and prototyping can be used to help provide the necessary confidence.

Vigyan Singhal – Oski Technology, Inc.
Mark Glasser – Nvidia Corp.
Mike Bartley – Test and Verification Solutions
Adnan Hamid – Breker Verification Systems, Inc.
Ashish Darbari – OneSpin Solutions GmbH