Registration is now closed for this event. Please subscribe to our newsletter to receive notice of upcoming Decoding Formal meetings.
The next Decoding Formal Club lunch and meeting is on Wednesday, October 21, from 12:00 p.m. until 4:00 p.m., sponsored by Synposys.
October 2015 marks the second anniversary of the Decoding Formal Club, and as part of the celebration, we have planned a series of technical presentations to engage and delight formal enthusiasts.
Oski Principal Engineer Prashant Aggarwal will give our featured presentation titled “How to Ensure Completeness of End-to-End Formal Testbench for Sign-off”. As a live case study we are bringing back the popular 2015 DAC “Break the Testbench” Challenge*, where participants entered 73 functional bugs over the course of three days, 100% of which were caught, proving that an end-to-end formal testbench is complete. You can view our “Break the Testbench” recap video, here. If you didn’t get an opportunity to take the challenge at DAC, you can now experience it live at our Decoding Formal Club event on October 21.
In addition, Yogesh Mahajan from NVIDIA and Vigyan Singhal, CEO Oski Technology will co-present a paper titled “Compositional Reasoning Gotchas in Practice”. Kenny Xing from Broadcom will present “Creative Formal Techniques to Verify PCache”. Our guest speaker Vikas Chandra, Principal Engineer in R&D at ARM, will deliver a talk about mobile hardware security, the ARM Trusted Execution Environment and the ARM TrustZone as a specific implementation, as well as use cases and authentication.
* * * Registration is now closed for this event. * * *
12:00 PM “Break the Testbench” Challenge* and Networking
12:30 PM Welcome, Lunch and ARM Guest Talk
Mobile Hardware Security
Vikas Chandra, Principal Engineer, ARM
1:15 PM How to Ensure the Completeness of End-to-End Formal for Sign-off
Prashant Aggarwal, Principal Engineer, Oski Technology
2:00 PM Coffee, “Break the Testbench” Challenge* and Networking
2:30 PM Creative Formal Techniques to Verify PCache
Kenny Xing, Principal Design Engineer, Broadcom
3:00 PM Compositional Reasoning Gotchas in Practice
Yogesh Mahajan, Engineer, NVIDIA
Vigyan Singhal, CEO, Oski Technology
3:45 PM Wrap-up and Prize Drawing
4:00 PM Computer History Museum Tour (Self-Guided)
* “Break the Testbench” Challenge supported by Synopsys VC Formal
Vikas Chandra Vikas Chandra is a Senior Principal Engineer at ARM Research in San Jose. He received his Ph.D. from Carnegie Mellon University in 2004. He serves as an AE for TCAS-I and is on the program committee for VLSI Circuits, CICC, ISLPED, ITC and IRPS. He also holds a Visiting Scholar position at Stanford University. Dr. Chandra is a recipient of ACM-SIGDA Technical Leadership Award and is a senior member of IEEE.
Prashant Aggarwal is Principal Engineer at Oski Technology where he leads End-to-End formal verification projects including network system IPs, modems, security, interconnect, and standard based IP with many leading edge semiconductor customers. He was an SoC Architect at VirtualWire Technologies, designed SRAM compilers at STMicroelectronics and holds a graduate degree in electrical engineering from IIT Delhi. He has authored four patents, and been published five times at DAC, MCAD, and CAV.
Kenny Xing has been at Broadcom for five years and is currently Principal Design Engineer. He has nine years’ experience as design or verification lead for various IP and SoC designs at Broadcom and others. He holds a doctorate in circuits and systems from Nanyang Technological University in Singapore and is an important contributor in verification areas including UVM and Mixed-signal simulation, as well as formal verification.
Yogesh Majahan is an Engineer at NVIDIA, and an invited speaker at this year’s FMCAD, where he will present the paper Compositional Reasoning Gotchas in Practice.
Vigyan Singhal is President and CEO of Oski Technology. He has worked in the semiconductor and EDA industries for more than 20 years, and founded two venture-funded start-ups – Jasper (acquired by Cadence) and Elastix (acquired by eSilicon). Vigyan began his career with Cadence Berkeley Labs as a Research Scientist. He has authored more than 70 publications, three of which won best paper awards. Vigyan has a PhD in EECS from the University of California at Berkeley where he was a Regents Scholar, and has a BTech in Computer Science from IIT Kanpur where he graduated at the top of his class.
This event is sponsored by Synposys.