Formal Verification of Software Configurable Silicon for SDN

Verification Continuum

Description
The configurability of multi-terabit Software Defined Networking devices ushers in a new level
of challenge in the verification process. The number of combinations of configuration settings
exceeds the practical limits of traditional verification methods. This paper describes how formal verification methodology was used to address this challenge on the Cavium XPliant® Ethernet Switch designs.

Author Saurabh Shrivastava, Wanying Xia, Keqin Han – Cavium; Chirag Agarwal, Paras Gupta, Roger Sabbagh – Oski Technology
Synopsys Tools Used VC Formal, Verdi
Target Audience Intermediate

SNUG Silicon Valley
March 21-22, 2018
Cavium to present
Formal Verification of Software Configurable Silicon for SDN | Thursday, March 22 | 10:30 AM